04-02-2008 07:29 AM
04-02-2008 08:38 AM
Angela,
I would like to send You the code, but I cannot send on a forum because of confidentiality,
I wil call the suport in the Netherlands so that they can arrange something
Regards
Frank
04-02-2008 02:10 PM - edited 04-02-2008 02:13 PM
Hello Frank,
There is not a limit as you mentioned before, but you do have to make sure that the buffer settings for acquiring from your hardware are sufficient. There is a configuration option in the SIT connection manager that you may need to adjust. I am posting images of the connection manager and the button I am talking about. It is on the hardare I/O tab. Make sure that the number of signals is at least as many as how many signals you are mapping. The default number is 50, so if you are acquiring from 100 channels, then this number should be 100 at a minimum. This change takes place when the driver VI is scripted.


Regards,
Angela M
Product Support Engineer
04-02-2008 03:16 PM
04-02-2008 03:52 PM
04-03-2008 08:00 AM - edited 04-03-2008 08:02 AM
Hello Frank,
Earlier I had asked you to check the values coming from the FPGA in the driver VI. I am posting a few screenshots to make sure that we are on the same page. If the values that I am pointing to are off, then you need to evaluate your bitfile and make sure it is behaving exactly as it is supposed to.
driverVIvalues.jpg shows the node where you should probe your values (this should not be broken wires for you). Indicatormappedindices.jpg and mappedindices.jpg are two other locations were we can verify this data for your problematic values.
Can you please double check and specify whether these values are nonsense, correct or zero?
Regards,
Angela M
Product Support Engineer
04-03-2008 10:52 AM
Angela,
did you also recieved the simplified code.
If I run the complete code ( the one I send you first) .
The values are
44 correct
45 ? hard to tel because they are changing
46 correct
48 correct
61 (IMEP) ?
51 (test simulink -4000) = -.122074
If I click on one of the indicators of the inports out and move my mouse over it the values are changing.?????
With the new simplified code I send you, it is more clear to check the values because all indicators on the FPGA are connected the Chassis/mod3/AI1.( exept for 51 (test simulink -4000)
Then I can easy check if the values are OK
result
44 same -> OK
45 same -> OK
46 same -> OK
48 same -> OK
51 -1.22074 (-1.22074*1638bit/V = 2000.06 <> -4000) NOK
57 0 -> NOK
58 0 -> NOK
60 0 -> NOK
61 NOK ( not the same as 44,45,46,48)
By the way I connot find block you showed in driverVIvalues.jpg
( you can call my on my mobile )
regards,
Frank
04-04-2008 06:22 AM
Angela,
the FXP only take effect when the old connection (fromer I16) are removed and reconnected in the SIT manager Hardware I/O
It will now work thanks you and your colleague.
Regards
Frank
04-04-2008 07:16 AM
Angela,
I was to fast with my conclusions the fxp option does not work, or it works sometimes.
I even removed all dirver vi and generated the driver vi's complete new, and still there are FXP indicators with conversion.
I now give up and wil fix the conversion in simulink.
04-04-2008 07:40 AM