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Reading SSI sensor as 1-bit shifted on PXI FPGA

Hello, I have a really interesting problem. 

 

I'm trying to read a SSI sensor using FPGA board on my PXI chassis. I coded the Labview program to read 32-bit data from the sensor. Interestingly, I'm reading the data as 1-bit shifted to the left. In other words, suppose that my data is xxx. I read it as 1xxx. There is an extra 1(logic true) at the beginning of the data. Since I read 32-bit, I lose the last bit. 

 

I read the RX pin when clock cycle is logic 0. I debugged the program and there is nothing wrong with the programming side. Can RX pins read the data which is in the past? If you wish I can add visuals(oscilloscope screen, front panel) about the problem. 

 

Thanks in advance.

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