SPI data problem

[marccoular]

Hello

i just want to create a spi interface on the PXI 7831R using LV 7.1. an LV FPGA 1.1. My problem is that the clock of the SPI interface works fine but the data is transferred not correctly.

I attached a screenshot of the code using that should create the data transfer. Furthermore a picture of the oscilloscope is attached. You can see the SCK frequency of 50KHz, 10µs high and 10 low. The data comes from several arrays taht are concatenated and then indexed by the loop. The loop is controlled by the loop timer(16bit, µs).

The first four bits should be an 1101b and then 0111b(sorry the last one is lost at the screen shot ;)). The problem now is the fist bit has the correct length but the second one is only for 10µon high and that creates a problem on transferring the data because the following bits are shifted.

Has anyone an idea? Is my code for the SPI interface correct?

[Christian_L]

Actually in your case the first data bit is only high for 10 us before it starts into the second data bit, but you can't tell the difference from the scope.

The reason is that the Loop Timer function does not create any delay on its first call. It simply sets an internal timestamp and then returns immediately. On all following calls it delays the program until the right amount of time has elapsed.  However since you have the update of the data line in the same sequence frame as the Loop Timer, the data line is updated immedaitely, before the Loop Timer is done.

To fix this problem you can combine the update of the data line with the first update of the clock line. In your current code, move the update of the data line into the second frame of the sequence and it will work correctly. Make sure the Loop Timer function is by itself in the first frame of the sequence.