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Setting up the interchannel delay in clock CONFIGURE.VI

I have a pci-6013.I am using it to sample 4 channels as simulatoneously as possible. I wish to set the scan rate to 10Khz and the inter channel delay to as minimum as possible ( leting the amplifier settle down of course).Going throught the example of continous acquisiton and graph buffered.vi, I have the following questions:
1) In AI CONFIGURE.VI, i am confused in how the channel clock frequency has been calculated.
if the interchannel delay is less than or =0 then it is directly fed into the CLOCK configure, otherwise its reciprocal is connected?
This makes no sense to me at all.
2) -1 is the default value. What delay does this DEFAULT translate into, in units of time, for PCI6013.? The maximum sampling ra
te of PCI 6013 is 200ks/s. If i make this -2, what would my inter channel delay be then?What if I make it positive (i.e.+2)
3) I understand you need one channel clock and one scan clock in order to be able to sample channels simulatoneously. In the specification of PCI 6013, it says it has 2 base clocks , 20Mhz and 100khz. . The maximum sampling rate is given as 200Ks/s. I assume the 20Mhz clock will be set up as the channel clockand the 100Khz will be the scan clock. Do i have to configure this at anypoint in my software?
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I have always been told that for the fastest samling time, leave the setting at it's default value. This setting tells the DAQ driver to calculate the interchannel delay using an undocumented (and nodoubt, highly complex) algorithm.

I have only had to manually play with the default value once--and that was because the person laying out the channel configuration landed signals in the wrong order. (switching back and forth between mV and 5V full-scale signals on consecutive channels plays h*ll with your settling time...)

Mike...

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Shubha,

1) In AI CONFIGURE.VI, i am confused in how the channel clock frequency has been calculated.
if the interchannel delay is less than or =0 then it is directly fed into the CLOCK configure, otherwise its reciprocal is connected?
This makes no sense to me at all.

--The "clock frequency" input to AI Clock Config.vi is expressed in channels per second. The "interchannel delay" input to AI Config.vi is expressed in seconds, but you can think of it as seconds per channel. Thus, if you input a value greater than zero for the "interchannel delay", the Reciprocal function converts from seconds per channel to channels per second. A value of zero for "interchannel delay" turns the clock off. Furthermore, a value less than zero leaves the clock frequency unspecified. Leaving the clock frequency unspecified results in NI-DAQ choosing a default clock frequency.

2) -1 is the default value. What delay does this DEFAULT translate into, in units of time, for PCI6013.? The maximum sampling rate of PCI 6013 is 200ks/s. If i make this -2, what would my inter channel delay be then?What if I make it positive (i.e.+2)

--For low scan rates, NI-DAQ sets the interchannel delay to [ (1/maximum sampling rate of the board) + 10 microseconds]. The 10 microseconds above the minimum interchannel delay is added to accommodate settling time for weak signals. With higher scan rates, NI-DAQ adjusts the interchannel delay to support these acquisition rates.

--Again, a positive value for the "interchannel delay" will directly specify the frequency of the channel clock (reciprocal of the interchannel delay).

Your Example:

interchannel delay = 2 seconds/channel
clock frequency = 1/interchannel delay = 1/2 = 0.5 channels/second

3) I understand you need one channel clock and one scan clock in order to be able to sample channels simulatoneously. In the specification of PCI 6013, it says it has 2 base clocks , 20Mhz and 100khz. . The maximum sampling rate is given as 200Ks/s. I assume the 20Mhz clock will be set up as the channel clockand the 100Khz will be the scan clock. Do i have to configure this at anypoint in my software?"

--You do not need to worry about configuring your "base clocks". This is taken care of for you.

Good luck with your application.

Spencer S.
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