I have to create a custom socketed CLIP for PXIe-6592, but I just can't figure out how to do it.
Could someone post an example .vhd file, which can be added to the FPGA target as socketed CLIP. As simple as possible. For example, it could have one boolean signal accessible in LabVIEW, which turns on the green LED on the front panel.
Any help would be appreciated.
