Streaming to/From fpga target

[AliSabra]

Hello everyone,

I am trying to continueously stream to and from an FPGA target using DMA FIFOs. For that I have used two while loops. I used two loops because I am practicing to do the same for generating and acquiring signals with a real time device. The VI works fine except that is not stoping. It is not responding to the stop botton attached to the loop condition. Does anybody know why ?

[wiebe@CARYA]

My guess is you use one button for the two loops. If the button is latching, the first read will reset the value, the second loop will continue.

Not a lot of people use NXG, you might post some screenshots.

[AliSabra · Accepted solution]

Thank you Carya,

The problem was in the handshaking in the FPGA code.

One stop button works also but two should also work if for example I want to stop only one loop and keep the code executing with the other one.

Best regards,

Ali

[wiebe@CARYA]

Ok, I accepted that as solution, so others will see the thread is solved.