Strobe data on the falling edge of the clock

[k_tunsten]

Hello,

A quick question regarding LabVIEW FPGA programming. I'm new to LabVIEW FPGA programming, so maybe I'm missing something obvious....

We're using a NI PXI-7952R together with a NI 6581 100MHz DIO digital adapter.

When reading a digital line I want to strobe the data on the falling edge of a clock. The clock signal is an external input for the system, with a frequency of about 65 MHz.

How can I configure the system to strobe the data on the "falling" edge of the external clock?

I didn't find any properties that can be applied to achieve this behaviour.

Thanks in advance for your help!

Kirsten...

[BTreece]

Hi Kirsten, 

I would like to help you with this issue, but unfortunately I am not sure what you mean by "strobe the data".  Could you please explain what you mean by this?

Brandon Treece

Applications Engineer

National Instruments

[k_tunsten]

Hi Brandon,

Thanks for the help...

I just mean reading in the data of the digital line on the negative edge of the external clock.

When using an external clock the data is always read on the positive edge of the clock signal.

I want the data to be read on the negative edge of the clock signal. I didn't find a property or setting how this can be configured.

Thanks again for your help!

Kirsten.

[BTreece]

Hi Kirsten, 

What logic are you currently using to read the rising edge?  Can you post a snapshot of your FPGA code so I can see how you are doing it now?  That would be very helpful.  You also might find this tutorial helpful for creating custom triggering options on LabVIEW FPGA.

Brandon Treece

Applications Engineer

National Instruments