Synchronize 9403 and 9402 on cRIO/FPGA

[psuedo]

HI,

I'm working with cRIO FPGA and DI/O modules 9403 (slow) and 9402 (fast).  It's a pulsed system and I need to synchronize the two modules, of which I am having troubles.  It seems the best I can do is to accept some jitter on the 9403 of about (total) 5 us using the 9402 as the 'master'.  I've tried disabling  arbitration and it doesn't help.  The 9402 is in a SCTL and the logic for the 9403 is as well, with the write outside the (SCTL) loop.  Any suggestions?  I'm  at a dead end.

[fblerg]

Hi psuedo,

You may be at the performance limit of the 9403 module. The spec lists an update/transfer time 7 μS max for the 9403. If you do need better synchronization, you may want to consider using another 9402 instead of the 9403. Are you doing a high DIO channel application and need the 9403 for a particular reason?

Would you also be able to post a screen shot of your block diagram for reference?