04-16-2015 04:41 AM
Dear all,
I use a cRIO-9074 for data aquisition in FPGA mode. Now, I need to synchronize my data aquisition with the analog input of a usb-6211 ad-converter. Does anyone have experience there?
My FPGA VI uses a singe cycle timed loop to use a counter. I could export this 40MHz clock and use it as sample clock in the USB device. That would be my fist idea. Could that work?
Thanks for any help.
04-16-2015 08:02 AM
04-17-2015 04:24 AM
Thanks for the hint, I need to sample at 1kHz max which is fine with the USB device.
For the 40MHz reference clock I think the reference of the USB is at the same speed but I would have to look that up. Anyhow, in priciple I could export a slower sample clock, but the question wheather this solved the problem remains for me.
Cheers Jack
04-17-2015 04:24 AM - edited 04-17-2015 04:26 AM
Hallo Jack_W,
You can use any input PFI line as the source of AI Sample Clock of your 6211, but your 6211 hast 16 analog inputs sampling at 250 kS/s (aggregated). So a AI Sample Clock
with a frequency of 250kHz would be the limit, assuming you use just one analog input.
The USB 621x devices have AI Sample Clock Timebase of either 100kHz or 20MHz which will be divided down by a Programmable Clock Divider to generate the AI Sample Clock.
regards!