Synchronize (synchronise) cRIO FPGA and Real Time

[St3ve]

Hi,

Is it possible to synchronise the clocks on the FPGA and the Real-Time controller on a cRIO. I know you can synchronise timed loops to the scan interface but can the two be synchronised without it via a hardware lien or something?

If not how does the scan interface do it? Does it use an interrupt to reate a timing source for the timed loops?

Many Thanks,

Steve.

[speleato]

Steve,

Are you using a User Defined Variable or do you have any modules under Scan Engine control?  If so you may have access to the Scan Clock I/O item on the FPGA.

See the "Accessing Timing Information from the NI Scan Engine" section for more information.  http://zone.ni.com/reference/en-XX/help/371599E-01/lvfpgaconcepts/pfi_data_transfer/. 

Even if you have no need for a User Defined Variable, you could include a dummy one to access this functionality. 

Does that give you what you need?

Sebastian

Message Edited by speleato on 02-12-2010 08:48 AM

[St3ve]

Hi Sebastien,

I don't have the scan engine deployed on the FPGA target. I ran into a problem with timing between my RT and FPGA and wondered why they don't have a common timebase, I can't see any reason why it is desireable for the two to be independant.

I realise I could use the scan engine to allow me to synchronise timed loops as you suggested but I don't want to use up the FPGA gates with teh scan engine.

I also wondered how the scan engine was achieving the synchronisation, maybe it uses an interrupt to derrive a timing source for the timed loops behind the scenes? If it is actually enabling some hardware sync with a clock line is it possible to do this without the scan engine?

Regards,

Steve.