There was a problem running two acquisition cards simultaneously on the CRIO

[JHUN-KULI]

Hi everyone, I'm having a problem using CRIO9074: I want to use NI-9232 and NI-9223 to collect signals on CRIO at the same time. These two acquisition programs are normal when they run independently, but when I put them into a FPGA program, the speed of receiving data in THE RT end gradually slows down and will time out after running for a period of time. I guess it might be:

1. The FPGA configuration does not support the simultaneous operation of the two acquisition cards

2. There is something wrong with my program design (I did not find a routine for running multiple acquisition cards in parallel)

I hope you can give me some suggestions, or provide the routine of parallel collection of multiple acquisition cards, thank you very much!

RT.viFPGA.vi

I uploaded the project file, the PC code is for testing (please ignore). I just combined 9223 acquisition program and 9232 acquisition program, please give me some parallel acquisition suggestions or routines, thank you.

[GerdW]

Hi Jhun,

I only looked at your images:

1. Are you trying to start two different FPGA bitfiles at the same time? This will not work!
2. Are you trying to start the same FPGA bitfile twice in parallel? This will not work (as expected)!

Do you get any errors after those FPGA reference calls?

[JHUN-KULI]

I put two FPGA acquisition programs in one FPGA. Vi, and the FPGA bit file started at the RT end is the same FPGA bit file, because I am not sure how to make two acquisition cards 9223 and 9232 collect in parallel in the same CRIO system. Do you have any relevant routines or suggestions? No suitable reference procedure was found.

[GerdW]

Hi Jhun,

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@JHUN-KULI wrote:

I am not sure how to make two acquisition cards 9223 and 9232 collect in parallel in the same CRIO system. Do you have any relevant routines or suggestions?

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The FPGA can only run one bitfile, so you should also start/open only one FPGA VI reference!

Again: Did you get any errors after opening two FPGA references?

[JHUN-KULI]

Do you mean the error that occurs when I run the program on THE RT terminal? It works, but the data refresh rate is slow, and the data updates slowly on the waveform, even though I set the adoption rate to maximum. I also get error 63195 when I stop the program, possibly because the handle used for device communication is invalid or has been closed. The second problem can be solved, mainly I want to know whether there is a standard framework or routine for FPGA VI and RT VI of the two acquisition cards running in parallel in a CRIO system for my reference. Thank you for your timely reply!

[GerdW]

Hi Jhun,

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@JHUN-KULI wrote:

Do you mean the error that occurs when I run the program on THE RT terminal?

I also get error 63195 when I stop the program, possibly because the handle used for device communication is invalid or has been closed.

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No, I mean the error when running the VI shown in your images from your LabVIEW development environment. Did you even debug your VI(s)?

Error -63195 means "invalid FPGA VI reference": a clear indication there is a big problem in your VI!

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@JHUN-KULI wrote:

mainly I want to know whether there is a standard framework or routine for FPGA VI and RT VI of the two acquisition cards running in parallel in a CRIO system for my reference.

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The "standard" framework is to have one call to OpenFPGAReference in your RT VI, and one main FPGA VI. Inside the main FPGA VI you can call as many subVIs as needed to handle all your modules…