Two LabVIEW projects or VI's with the same cRIO 9056 as a target

[Nadweb]

I'm wondering if you can run two VI's (from different LabVIEW projects or on the same project) at the same time on the same computer that are both using modules on the same cRIO 9056?

1. Say you have have four 9870 modules in the RIO, can one VI utilize two and the other VI utilize the other two 9870's?

2. Can one VI use two of the serial ports on a 9870, and can the other VI use the other two ports on a single 9870?

If one or both of these above scenarios work, can the VI's be on separate LabVIEW projects with the same cRIO as a target, or would they need to be on the same project?

Thanks in advance for your answers!

[GerdW]

Hi nadweb,

1. Yes.

2. Yes.

I guess it will be easier to put those VIs into the same project...

[Nadweb]

Thank you for your answer, Gerd!

If I could ask two quick follow ups at the risk of being a bit redundant, 

1. Can the above scenario/setup work for more than 2 VI's, say 3 or 4, as long as there are open VISA resource names not being used by other VI's?

2. Will a 9209 module also work with multiple VI's at the same time? So VI 1 can read a few differential pairs, and VI 2 can read a few other differential pairs, and maybe VI 3 reads the rest of the differential pairs?

Just trying to better understand capabilities.

Thanks,

[GerdW · Accepted solution]

Hi Nadweb,

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@Nadweb wrote:

1. Can the above scenario/setup work for more than 2 VI's, say 3 or 4, as long as there are open VISA resource names not being used by other VI's?

2. Will a 9209 module also work with multiple VI's at the same time? So VI 1 can read a few differential pairs, and VI 2 can read a few other differential pairs, and maybe VI 3 reads the rest of the differential pairs?

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1. As long as each VI handles only its own COM port there should be no problems.
2. The NI9209 module uses only one ADC with a MUX: typically you cannot share that ADC between several (DAQmx) tasks. But: you are using a cRIO! Here you can move the analog signal reading into the FPGA and create your own API (between RT host and FPGA) to enable several VIs accessing their set of channels of that module…

[Nadweb]

Thank you for the help Gerd!! That all makes sense.