11-07-2007 12:33 PM
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11-09-2007 11:34 AM - edited 11-09-2007 11:34 AM
11-09-2007 02:36 PM
11-12-2007 01:34 PM
Hi,
I had a look to the chip manual and your code and here is what i found:
Mainly code issues. You are seeing all those hex 33s because he is writing/reading 200 bytes in his script instead of 10. The chip requires at least a 1.5 ms delay between its "frames" (a frame being a 10-byte SPI write/read). See the code below with comments in red:
uInt8 WriteData[200];
// write array for address bytes // Why 200? Only 10 bytes are transferred.uInt32 ReadSize = 200;
// Why 200? Only 10 bytes are transferred.uInt8 ReadData[200];
// read array for bytes to read // Why 200? Only 10 bytes are transferred..
.
WriteSize = 200;
// Write size should be 10 and not 200.WriteData[0] = 0x55;
// Okay, I think this makes sense for 2N5457 transistor (N-channel instead of P-channel as shown in datasheet)...WriteData[1] = 0x00;
WriteData[2] = 0x00;
WriteData[3] = 0x00;
WriteData[4] = 0x00;
WriteData[5] = 0x00;
WriteData[6] = 0x00;
WriteData[7] = 0x00;
WriteData[8] = 0x00;
WriteData[9] = 0x00;
.
.
/* configure Polarity and Phase */
errChk (ni845xSpiScriptClockPolarityPhase (ScriptHandle,
kNi845xSpiClockPolarityIdleLow, kNi845xSpiClockPhaseFirstEdge));
//kNi845xSpiClockPhaseSecondEdge)); // Polarity looks good. Phase should be kNi845xSpiClockPhaseSecondEdge. From the datasheet, CPOL=0, CPHA=1..
.
/*issue a delay to allow the MLX90316 to boot up*/
errChk (ni845xSpiScriptDelay (ScriptHandle, 1));
// From the datasheet, 6.9us required between CS LOW and first clock... He may not need this delay here, but won't hurt anything...
/* write data array */errChk (ni845xSpiScriptWriteRead (ScriptHandle, WriteSize, WriteData, &ScriptReadIndex));
/*issue a delay to allow the MLX90316 for a response*/errChk (ni845xSpiScriptDelay (ScriptHandle, 20));
// Not necessary... The 90316 "responded" as the// data was being transferred (during ni845xSpiScriptWriteRead).
/* issue stop condition */errChk (ni845xSpiScriptCSHigh (ScriptHandle, Chip0Select));
/*issue a sync delay between MLX90316 frames (an MLX90316 frame being an SPI write/read of 10 bytes)*/
errChk (ni845xSpiScriptDelay (ScriptHandle, 2));
// The datasheet does specify that the CS line must
// held HIGH between 10-byte (MLX90316 frame) accesses, for 1.5 ms. The resolution of our delay is 1 ms, so he should write a delay of 2
// to meet their minimum. This should be here for when he uncomments the while loop (should follow each 10-byte write/read)...
For a single write read try the basic code attached to this answer.
Concern: I don't see mention of a pullup resistor, but everything else looks correct. Melexis does not specify a part number or electrical characteristics for the transistor to use anywhere in the datasheet. Whether or not the 2N5457 you have choosen chosen is appropriate or not is unknown. The 8451 provides a "standard" SPI interface with separate MOSI and MISO pins (and our documentation provides voltage and current characteristics for those pins). Melexis has developed their own 1-wire version of SPI that requires a custom circuit between the 8451 (or any other "standard" SPI master) and their slave.
DirkW
11-13-2007 04:35 PM