Hi Ed,
In regards to your first problem, that is definitely a bug in the Unused Code test...the "Request Deallocation" function obviously shouldn't fail that test. I will make sure this gets fixed in the next version of the VI Analyzer.
For the second problem, I would argue that both of the examples you give in your screenshots should be flagged by the test. You are correct that the wires are not technically "under" the For Loop N terminals, but I feel that both examples are not good examples of wiring, especially given all the extra space to the right inside the For Loop. The wires are unnecessarily crowded up against the N terminal. Obviously this is a trivial case, but the purpose of the Wires Under Objects test is to improve the readability of diagrams
, and I think we all agree that diagrams are more readable with more whitespace between wires and adjacent objects.
Nevertheless, we do plan to add a pixel tolerance option to the test in the next version of the VI Analyzer, since I know that not everyone agrees with my purist views on wire spacing.
🙂One more thing...I noticed in your post that you are using LabVIEW 7.1 and the VI Analyzer 1.0. There are some issues with using the VI Analyzer 1.0 with LabVIEW 7.1, and these issues are addressed and corrected with the VI Analyzer 1.0f1 patch. You can read about the issues, and click a link to download the patch, in this
KnowledgeBase document.
Please let me know if you have any other questions or feedback on the VI Analyzer.
Darren N.
LabVIEW R&D