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VI for a cRIO 9002

I am trying to write a Labview program for a cRIO 9002 chasis with all 7 modules. I want to mainly read temperature, but ultimately control it as well with RTD's and heaters respectively. When I wrote the first parts of the software, which are attached here, one is for the target, and the other one for the host, and tried to compile it, I got an error message saying that I had run out of gates ( 1 million for this particular model of FPGA). It seems to me that there could be a more compact way of writing the software so that it could compile with the number of available gates. I would appreciate you feedback.
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Some questions (no solution though).

I would remove the to U32 conversions, they will do nothing.

I would remove the inner while loop and connect the shift register to the main while loop.

I would use the TickCount value from the VI that controls the tick count:

 

 

Ton

 

Message Edited by TonP on 12-11-2008 08:55 PM
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What version of LabVIEW are you using? I'm guessing LabVIEW 8.5 just from your code where you convert things to U32 before you send them through FIFOs. LabVIEW 8.5 only supports U32 FIFO data type. Honestly, as much as I hate saying this, the best option here would be to upgrade to LabVIEW 8.6. If you are using LabVIEW 8.6 you could do this data movement from FPGA to Host using FXP data type so you don't have to get calibration data first, as the FXP data is already calibrated when you grab it from the module, and the FIFOs can easily handle that data type... no need to waste space doing U32s.

 

Does your compilation report say what is running out of space? Is it block RAM or is it flip flops and LUTs? 

 

To get this working in LabVIEW FPGA 8.5, you can remove the FIFO for getting the calibration data to the host. Since this is only used once, you can replace it with just indicators coming from each of the I/O nodes. So instead of grabbing the calibration data from each I/O node, converting it so it is U32, building it into an array, and pushing it through a FIFO... you can replace all of that with just indicators for each value.

 

For the loop where you get the data, you can 'pack' the data into the FIFO more efficiently so you don't waste as many bits. So if each channel of your input data is 16 bits, instead of converting each channel up to 32 bits and having 16 wasted bits, you can pack two channels together so the first 16 bits are one channel and the second 16 bits are another channel. That way you do half as many writes to the FIFO and you use half as many bits. Of course, on the Host side... you would need to break the U32s received from the FIFO apart so that you grab each channel as desired. 

 

Let me know if this helps! 

 

Stephen B
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