Virtex-5 SX50T Resource Utilization Statistics Documents

[jp82]

At NI Week, I learned that there are fantastic documents on FPGA Resource Utilization Documents in this white paper:

http://www.ni.com/white-paper/7727/en

Is there a similar paper on the Virtex-5 SX50T FPGA (7962R) card anywhere as I cannot seem to find it?

Thanks.

[WishKebab]

Hi jp82, 

I haven't been able to find any similar information for the 7962R, so I'm thinking that the FPGAs on that page you linked are the only ones that have those additional documents.  I did find some other general information about the 7962R and the SX50T FPGA in case you haven't seen it yet:

Xilinx Virtex-5 Family Overview

KnowledgeBase Article: How Many Slices Does My FPGA Chip Have?

Developer Zone Tutorial: Taking Advantage of Xilinx Virtex-5 FPGAs with NI LabVIEW

[jp82]

Thanks for the links.

Do you know if the other Virtex-5 processors listed in the white paper would be a good proxy for the SX50T in terms of the resource usage? I don't need exact numbers, I'm just trying to understand the resource tradeoffs in for choosing different block diagram elements,

[WishKebab]

I would think that any of the FPGAs in the Virtex-5 family would be relatively close to the SX50T, in terms of resource usage, since they are of similar architecture.  You can compare the different models in that Xilinx data sheet to see which ones have the resources you will require.