04-27-2005 04:54 PM
04-27-2005 05:35 PM
04-28-2005 10:55 AM
04-28-2005 06:10 PM
04-28-2005 06:18 PM
04-28-2005 07:01 PM
04-28-2005 09:33 PM
04-29-2005 08:09 AM
04-29-2005 08:19 AM
04-29-2005 08:36 AM
@johnsold wrote:
Scott,
Perhaps a different timing approach would minimize your errors and eliminate your "phasing" issue. Your application seems to be a good candidate for a state machine architecture (Case structure inside loop). Look at examples and search the forums for "state machine" for more information.
For the timing read the Tick count. Add to it the number of milliseconds to wait to create an "End of Delay" time value. Periodically (in a loop) read the tick count again and compare to "End of Delay." If the current time is greater than or equal to the End time, change the state of your valve, or whatever. This way you can have multiple delays running simultaneously if appropriate and the worst case "phase shift" is the time it takes to send your digital out and get to the next state.
One caution: The tick count is a U32. It will overflow after the coputer has been running for about 49 days. If your system can run that long without rebooting the computer, the overflow case needs to be addressed.
Lynn