12-01-2011 02:24 PM
I'm reading over the help section on this method and am wondering: can I execute my code without wiring out an asserted IRQ? In our other existing projects, we've been wiring T/F cases to the Timed Out output of this method.
To illustrate:
Would the following (located in the RT portion) implicitly execute on an asserted interrupt from my FPGA, or would I need to surround the FGV in a case based on the asserted IRQ or Timed Out portion?
Yes, I would test this, but I am not at the office to deploy to a chassis. 😛
12-01-2011 02:35 PM
Everything you have to do is to maintain dataflow!
So as long as your FGV is in between the Wait on IRQ and the Acknowledge - in Terms of Dataflow - it will run after IRQ is fired.
The "Asserted IRQs" Terminal is used when you are waiting for more then one IRQ.
Christian
12-01-2011 02:48 PM
Sounds good.
Thanks Christian