Watch the communication bewtween CRio FPGA and host computer

[drolle]

Hello!

 I'm developing an application using Labview 2018 with a cRio as target. Sorry if my question is quiet trivial, I'm a beginner. 

 A part of the job is done directly in the FPGA. But if the communication between the FPGA and the host computer is lost, the FPGA will continue to do it's job which is not suitable in my case.

 My question: is there a possibility ( a function bloc)  to watch the communication between the host computer and the FPGA and to then to generate an error handle, i.e:

• if communication lost then do this and this
• if communication is back do this and this

 In advance thank you for your help.

[oscarfonseca · Accepted solution]

Hello drolle,

Thanks for using the National Instruments forums. In general, the FPGA will communicate with the Real-Time Operating System (RTOS) in the cRIO, which will then forward the data back to the Host computer using the network. That being said, there's different ways in which this communication happens, depending on how you are running your FPGA code. You can find that information here: Communicating with FPGA Targets from a Host Computer (FPGA Module).

You can also explore the possibility of using the RTOS to build a more robust system that can shut down your FPGA when the communication with your Host computer is lost, perhaps using interruptions or sending a watchdog pulse to the FPGA VI. You can find more data communication possibilities here: Understanding Communication Options Between the Windows HMI, RT Processor, and FPGA.

I recommend you check the CompactRIO Developers Guide to find more about developing your system and using LabVIEW's powerful environment to your advantage.

All the best,

[drolle]

Thank you for youe help. I have now more information to target on the right part of the documentation.

Best regards.