Why does expanding a timed loop always expand diagram in the same direction?

[GerdW]

Hi Norbert & others,

I have to jump into that discussion. I also have found a smaller annoyance when resizing timed loops:

I have wired a value to the output node of the timed while loop (I change "dt" value according to current system state). The node is located on the upper border of the structure. When making the loop smaller (reducing height) then the node moves, which is ok. BUT: it moves nearly all the way down to the lower border of the loop... Why does it move down there? Each time I have to move it up again...

[Norbert_B]

Gerd,

i am not sure if i checked the behavior you are describing correctly, but i don't see it in my LV2009f2. Could you attach a small example showing the issue?

Norbert 

[GerdW]

Hi Norbert,

I couldn't reproduce this behaviour with a new, fresh VI. So it seems to be a problem specific to my VI in work - unfortunately it's kind of template used for other routines by copy&paste...

See attached pictures. Just a small resize of the loop at the upper border moves the output node nearly all the way down...

Message Edited by GerdW on 12-07-2009 12:37 PM

[Norbert_B]

Hm, this is strange. Have you tried replacing the timed loop with a timed loop?

Is it possible, that this template was made in an older LV version? 

Does the issue occur if you copy just the BD instead of using the whole VI as template?

Norbert 

[GerdW]

Hi Norbert,

yes, it's strange. But it's not that annoying

As I keep the BD size rather fixed I don't have to move the output node that often. So I have to weight "annoyance" with "having working code" - at the moment "having working code" clearly wins due to "end-of-year time constraints"...