I would like to use Xilinx Coregen to generate FIFOs for my LabVIEW FPGA project. The help file says to look on the programming palette inside an FPGA VI, but I don't have one. I have the IP Integration Node and all the FPGA functions, but no Coregen. The application itself is installed on my computer. Is there an installation option that I missed? How can I get this to show up? Rgds, Nick

The .ngc file IS the netlist. It should be generated next to the .xco file as part of the Coregen process. It should have the same name (for mine I named the component generated_fifo) so you would see generated_fifo.xco, generated_fifo.ngc, and there should also be a generated_fifo.vhd. The .xco file is essentially a list of coefficients and parameters for generating the core. The .ngc file is a synthesized version of the core that used the .xco file for generation. The .vhd file is a simulation model of the core. It usually will not be synthesizable, but can be used for simulation. So, the only file you would need to add in the configuration for the node would be the .ngc file (which is the netlist). You will then need to configure the simulation behavior to either use the matching .vhd file for simulation or use a post-synthesis model.

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Xilinx Coregen does not appear in palette

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Got it now -- thanks a lot!

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Xilinx Coregen does not appear in palette

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