05-17-2012 11:30 AM
I'm using Labview 2010 SP1. NI PCIe-1473R. The help page for the DRAM (FPGA Module -> NI FlexRIO Help -> DRAM Interfaces -> Configuring DRAM with Socketed CLIP -> DRAM Memory Interface -> Random Access - 128 Bit Memory Interface) mentions at the bottom that "LabVIEW contains example VIs that read and write to the Random Access - 128 Bit memory interface." I can't find any such examples. I am looking at Hardware Input and Output > FlexRIO > External Memory; I only see 3 examples there. I am looking specifically for an example that is using the DRAM as addressable memory (not FIFO) through the CLIP interface. Can someone point me to the correct direction?
Thanks
05-21-2012 06:42 PM
Hello Elsayed,
I'm only seeing those same examples. There are some other examples listed in the Vision-RIO section of Hardware Input and Output, although they may not be exactly what you're looking for.
I've also done a search of our online resources and haven't found any examples of this access. What is the end application that you're trying to build towards?
Regards,
Dave C
05-21-2012 06:47 PM
It's OK, I think the Labview FPGA memories method to access the DRAM is equally efficient and its easier to work with. If you are interested about my application, I asked a question here: http://forums.ni.com/t5/LabVIEW/hdl-files-in-examples/m-p/1999777#M658378. I would appreciate it if you can assist me there.
Thanks