Sorry for the delay, I have contacted the developer of the algorithm in the mean time.
Let me summarize his remarks:
We can certainly help you extend the DAC bitness. Are you aware that other limitations might come into play, such as amplifier noise and certainly the ambient environment, which must be very well controlled to achieve this sort of precision?
How will you measure positional performance?
1) The card you mentioned is capable of 204.8 kS/s. How odd that it would take 100msec to buffer up a waveform. A quality, instrumentation-grade 16-bit DAC plus HyperBit might actually be an ideal option for your application.
Did you mean that the same waveform, when fed to this card, buffers and begins execution within 200usec? That still sounds maybe a little slow, but it seems more than adequate for what you want to do. Once it is running a waveform, it is capable of 2.8 MS/s. Nice card!
To start our discussion, let's assume you continue to update the output at 5kHz, although even 1kHz should be plenty considering the bandwidth you are likely to get from a motion mechanism capable of 10mm travel. Also, there would be no point updating the DAC process any faster than your loop rate. Without going into detail, we calculated that at full speed of 2.8MS/s the resolution increase would be about 9 bits-- 2X more than you need. 2.8MS/s might load up the bus a bit, though, so you might want to
consider slowing things down. Note that you can improve resolution by 5X
(two and a half more bits) by reducing the bit rate to 1kHz. Then, you could slow the card's update rate by a factor of five, which would
benefit your bus' responsiveness, and still gain your 9 bits resolution
improvement. Since buffering overhead is already an issue for you,
this is probably a good idea. I doubt your mechanism can benefit from a
loop rate greater than 1kHz anyway. At a 1kHz bit rate, you could achieve your target 8 bit resolution
improvement by running the card at only 280kS/s-- the card is loafing
at that rate, so this should be no problem.
2) Any noise introduced is equal to one LSB in amplitude, by definition. There is already bit noise at this level for any DAC. We are merely modifying the noise statistics, concentrating it at the actual update rate, which should (and in this case undoubtedly is!) chosen to be significantly higher than the stage's resonant frequency. I really doubt you'll see positional noise at that frequency, thanks to the physical rolloff of the system. Frankly, I ever have, and I've looked for it.
Are you using the PI Analog GCS library, or would you want a low-level HyperBit VI?
If you would like to go on with this and you are interested in using this algorithm, please send me a PN with your email address and contact information and I will get you in direct contact with the developer of the algorithm.
Regards,
Gabs
