compactRIO Device Utilization exceeds 100 %

[chiks]

I have created a project in LabVIEW FPGA, which is comparatively bigger in size. It runs nicely on development computer. But when I compile it for compactRIO 9073, device utilization exceeds 100 % and a warning occurs that says that design might fail to fit on device because resource utilization exceeds 100 percent.  Please help me to get rid of this problem.

Thank You in advance.

[crossrulz]

Without code, there's not much we can do to help.  But here are things to look for:

1. FIFOs are way to big in size
2. Using larger data types than you really need
3. Use Single Cycle Timed loops whenever possible
4. Passing of large arrays via front panel (use a DMA instead)