counter channels detection through a labview VI

[Kirit]

Hey

We are having a PCI-6036E card which has 2 counter inputs and this device with counter channels is communicating with the program creadted in Labview.

We want to upgrade that card with add on counter card of PCI-6624. I even modified the program like increasing the counter channels in the program. Now with functional generator i give frequency as input and that i can read in the MAX through counter channels.

So when it comes to the program, it is reading only the 0 channel(i mean the first channel) and for the rest of the channels i see NAN. I am messed up and going through the source code but i see no error in the program.

If i messed up the description i can come back again with better explanation. Can anyone guide me to solve this issue.

Thank you in advance

-Kirit

[I_I]

Could you share part of Source code(counter acquisition) to provide solution.

[Kirit]

Iqbal

Thank you for the respose. The problem i have in sending source code files is, the total program of 276 Vi's with 118MB capacity. The counter acqusition code is involed in most of the VI's.

So any suggestions to post these files

Thanks

-Kirit

[Wallace_F]

Hello Kirit, I would like to help you with your problem, but I'm afraid I have very little to go on. I agree with Igbal Ina...when he asked for a look at your source code. This is the most direct way for us to get a thorough understanding of what you are trying to do. In trying to understand what you are seeing, I have the following questions: What type of signal are you sending from the function generator to the counter input channels of your PCI-6624? What is it's amplitude or level, and frequency? Have you tried just verifying the operation in MAX using a counter input test panel for the channels of your PCI-6624? What type of indicator is it in your program where the NANs show up when you run your program? What are the inputs to these indicators? Any additional information you could provide would be very useful in helping solve this problem. Best wishes, Wallace F.

[Kirit]

Hey

Thank you for the concern.

I will try to answer ur questions...

What type of signal are you sending from the function generator to the counter input channels of your PCI-6624?

Frequency signal with current of 2.5mA. By this i can read the frequency what ever i give in Functional generator through MAX.

Frequency level is from 100 - 1500 HZ

Have you tried just verifying the operation in MAX using a counter input test panel for the channels of your PCI-6624

Above signal i reading it through test panel of PCI-6624 card in MAX

What type of indicator is it in your program where the NANs show up when you run your program?

It is numeric indicator i guess. This you can see in to digitals-rpt.VI

I dont know what else i can do to explain the problem. You can come up with any questions for clarification after going through the llb file.

I guess, the logic i am missing in adding counter channels in the code is in( to digitals-rpt.vi)

Pls go through the *.llb file

Thanks a lot

-Kirit

[Wallace_F]

Hi Kirit,

I've spent some time looking at your code, and I noticed that there seem to be "NaN" wired as index inputs to a build array.  I noticed this in the "to digitals-rpt.vi" file on the block diagram. It would appear that these "NaN' form an array which is then indexed into by the d1, d2, and d3 indicators.  However, what I could not find was any counter input tasks or any indicators linked to counter input tasks. Another note about the NaNs; they occur in a stacked sequence structure of 8 frames, and each frame has a case structure with two cases, true and false.  The NaNs occur in the false cases of all of the case structures inside the stacked sequence structure. It might be that the boolean input to the case selector for each case is always false.  To verify that, I recommend running the VI in highlight execution mode, and checking to see if these cases structures ever go to their tru cases.

Best wishes,

Wallace F.

[Kirit]

Hey Wallace,

Firstly ,

When i run this VI in highlight execution mode, it is taking boolean false just after indexing.....

But i see same sort of execution even in the original program developed for 2 counter inputs. I dont see the diff in coding of VI as well.

I am sending you the original llb file with 2 counter inputs.

May be after going through the original llb , you might get some sort meaing or diff between the two that can help us to find a solution.

Secondly,

With the two counter input channels what i have right now, can i synchronise the signals to see a phase shift of 90 deg between the 2 counter input signals(just like the encoder pulse signal). When i am giving exicitation or signals from functional generators to both the counter inputs independently. May i get some help in achieving this task.

Thanks

Regards

Kirit

[Wallace_F]

Hello Kirit,

Thanks for sending the original version of your code.  Unfortunately, I am having a little difficulty following it because the front panel appears to be a little cluttered.  I still want to help you and I think that the most effective way is to have you show me the data flow in you code from the creation of the counter input tasks, to the data output from the DAQmx read VIs, to the indicators that show NaN. 

I would like to begin by having you post screenshots of the section of your code that show the cluster of controls for the counters on the front panel, and the creation of these counter input tasks if you didn't create the tasks in MAX.  I am looking for your counter input tasks because I couldn't locate them anywhere in your code.  I also noticed that you had a task name control on your front panel for counter 0 task, but I couldn't locate them for counters 1, 2, and 3.

Best wishes,

Wallace F.

[Kirit]

Hello Wallace

Thank you very much for ur follow-up. Pls check the attchement with screen , may be you find the missing parameters or controls u were looking for. And of course This is the first priority work for me.

I was mentioning about the second target like.....using these counter inputs in synchronizing the signal to get a quadrature signal output. I am using a PCI-6624 card with 8 counter inputs. My idea is to synchronize any 2 counter channels by giving input signal as same as quadrature encoder to get the angular position like.....signal A leads Signal B with 90 deg phase shift.

I dont have the quadrature encoder wit me now but i am using functional wave form generator to genarate the signals independantly from both the generators and synchronizing them to get the position as we will be using same clock & start trigger time for both.

 Hope you got me,,,post any suggestions if this is achievable with this idea to get a signal what we are looking for with 2 functional generators.

Thank you

Regards

Kirit

[Wallace_F]

Hello Kirit,

Thanks for attaching the screenshots in your last post. First, I would like to make a note that the front panel is very difficult to follow, as many of the controls and indicators seem to

overlap each other, making it hard to distinguish between them. A good coding practice is to make your front panels and block diagrams organized in such a way that anyone who is familiar with LabVIEW can follow them.  That being said, I'll move on to the issue of the NaNs in your numeric indicators.  As I said in an earlier post, I can see where the NaNs are wired as inputs to build or index array functions that are meant for the data from the counters.  But, nowhere in any of the code, or screenshots that I saw did I see where you did a DAQmx Read for any of the counter channels.  All I could see for setting up the counter channels in "start counter_block dig.JPG" was a DAQmx Create Virtual Channel (Counter Input) VI, a DAQmx Timing VI, a DAQmx Channel Property Node for specifying the data transfer mechanism, and a DAQmx Start Task VI, but no DAQmx Read VI.  I assumed that this would follow the DAQmx Start Task VI.  Are the DAQmx Read VIs for your counter input channels located somewhere else not depicted in any of the screenshots?  If there are no DAQmx Read VIs, you need to include them for all of your counter input channels, or show me where they are.

Regarding, synchronizing the two counter channels, I suppose that it is possible.  You could use one of the Counter Input, angular position examples from NI Example finder as sort of a template.  One source could serve as channel A and the other channel B. The only thing that is unclear is how you would synchronize your signals to be 90 degrees out of phase.  If they are both the same frequency, you could simply delay the lagging channel by a quarter of the period.

Best wishes,

Wallace F.