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difference HDL interface node and component-level IP (CLIP)

HI,

 

I need to integrate a custom FPGA IP on a PXI-7813R. I don't understand which way is better for me. HDL node or CLIP!! 

 

I don't understand differences. Is it the same thing so I 've to choose one way. Or is it different and I don't have the choice.

 

 

Thanks

 

James

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It depends on the requiremenst of your HDL IP and how you plan to use it.

 

Here is a brief discussion related to your question:

 

http://digital.ni.com/public.nsf/allkb/CE502221933FCCEB8625750000011FB5

 

 

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This link is broken; is there an updated one?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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