fpga synchronize clock

[wiebe@CARYA]

First, let me tell you all that this is axactly the same question as :

http://forums.ni.com/ni/board/message?board.id=170&message.id=146401&query.id=94002#M146401

But this question was never answered, and it is very old. I'm now using LV8.5, a PXI-7813R on a PXI-1042Q.

The problem is I need to synchronize the PXI-7813R clock to an external 10 MHz clock source. The suggestions in http://digital.ni.com/public.nsf/allkb/53306F0FDA486B298625738A007B130F?OpenDocument simply don't seem to work.

Here is how I did my measurements.

We get a 1 PPS GPS pulse from a GPS receiver. We count the FGPA ticks between two upgoing signals. Instead of getting 40000000 ticks, we get about 39999200 FGPA ticks in one second. that is bout 20 PPM, way within specs of the FPGA clock (100 PPM). If we use the PXI clock as suggested in the refered document, we get exactly the same deviation! Again the deviation is within spec: the PXI clock should be 25 PPM accurate. If we use an external source we still get the exact same deviation, while the source is .1 PPM accurate!

I did this on a cold system, and a warm system. The deviation was different (about 780 ticks), but still exactly the same for each clock source.

So since all three source give the exact same deviation, my conclusion is the FPGA is using the same clock, and using the PXI clock is simply not working.

Any suggestions? Thanks in advance.

Wiebe.

[wiebe@CARYA]

Ok, here is how I got it working... Although it might still be coincidental after a number of reboots.

It turned out that the FPGA was working fine, without proper configuration in of the system in Max. So in Max, I configured the system (identified the chasis, the controller and the card was already identified as being a PXI1042Q, PXI8196 and PXI7813R). I also tried to give the 7813R card the same alias as in my LabVIEW project. I couldn't do this, because there was a space in the name. So I changed the name in my LV project, and gave it the same name in Max. After a reboot, it worked.

We now have a .75 PPM deviation, probably caused by the phase locked look. We'll try it out with a 40Mhz clock instead of a 10MHz clock to further improve things.

Hope it helps someone... Regards,

Wiebe.