from LV 2011 to LV 2013

[fabio.intel]

Hello,

I'm working with an old project... It has some VIs on PC and someothers on the FPGA of a cRIO. I started it in LV 8.5 and now I have it on LV 2011.

I have to fix a bug an so I do it... but when I have to install it on the customer's PC I cannot do it. I was able to create the exe file and the installer. I installed it on the customer's PC, but when I try to run it he is asking me the NiFpgaLV.dll file.

So I decided to migrate the project in LV 2013. If I try to compile the FPGA VI it didn't work.

Please, find attach the XilinxLog file.

[B.Buerkert]

Hy,

can you upload a screenshot from the compiler window, where the error is shown.

[B.Buerkert]

One problem is that some parts are Overmapped. See below:

Design Summary:
Number of errors:      1
Number of warnings:   85
Logic Utilization:
  Number of Slice Flip Flops:        17,346 out of  28,672   60%
  Number of 4 input LUTs:            34,092 out of  28,672  118% (OVERMAPPED)
Logic Distribution:
  Number of occupied Slices:         18,106 out of  14,336  126% (OVERMAPPED)
    Number of Slices containing only related logic:  14,451 out of  18,106  79%
    Number of Slices containing unrelated logic:      3,655 out of  18,106  20%
      *See NOTES below for an explanation of the effects of unrelated logic.
  Total Number of 4 input LUTs:      35,997 out of  28,672  125% (OVERMAPPED)
    Number used as logic:            34,069
    Number used as a route-thru:      1,905
    Number used as 16x1 RAMs:            16
    Number used as Shift registers:       7
  Number of bonded IOBs:                117 out of     484   24%
    IOB Flip Flops:                      70
  Number of RAMB16s:                     91 out of      96   94%
  Number of MULT18X18s:                  23 out of      96   23%
  Number of BUFGMUXs:                     3 out of      16   18%
  Number of DCMs:                         1 out of      12    8%