host to fpga transfer

[marcomarco92]

hi, I wanted to know if it is possible to have some help about the realization of an optimized VI that acquires data from a host, through FIFO saves them in a circular buffer implemented with the DRAM memory of the fpga. Thank you

[GerdW]

Hi marco,

two comments:

1. It would help when you would provide your current un-optimized VI/project.
2. It would help to put the message text NOT into a code section…