how do you configure the ADC on RIO7833R for differential inputs?

[Floris HJ]

I use the 7833 RIO board; my signal source is a differential signal.

According to the documentation I can configure the inputs to be differential using software, but I have not been able to find any instructions on how to do this.  Can anyone point me to a way to achieve this?

There is the obvious "braindead" method of putting the positive signal into AI0+, and the negative signal into AI1+, then subtracting - but that would only allow me to use 4 inputs, not all 8.  And it would probably increase the noise due to ADC nonlinearity.  The diagrams show a MUX, I just can't seem to find a way to configure it and the default mode appears to be single-ended.

Thanks a lot for any information!

Floris HJ.

[Prashanth]

Hi Floris,

The information you are looking for is contained in the KB linked below. Have a great day!

Analog Input Mode Configuration of 783xR Board in LV 8.0 : http://digital.ni.com/public.nsf/websearch/08EF26D2E9041BC6862570E0001E442E?OpenDocument

Regards,
Prashanth

[Floris HJ]

That's great help, thanks Prashanth.  It answers the question which I asked, not the one I wanted answered.  So now the 64 thousand dollar question (from the days when that was still a lot of money):

Can you do the same thing from software?  In other words, could I set up my VI so it can change input mode in response to a user input or other external condition, and that doesn't require a user navigating to the project explorer?  It would appear that there is some direct access of flash memory going on.  If we know the address, could we poke that register directly (perhaps from the FPGA code itself - obviously we'd then have to signal from the host VI to the FPGA code but I know how to do that).

Thanks in advance for any help.

Floris

[Prashanth]

Hi Floris,

The input modes of the FPGA cannot be changed programmatically. If I come across any contrary information I will post it here. Have a great day!

Regards,
Prashanth