how to improve sampling rates in mega samples spartan 3e board

[discussion_forum]

 I am trying to acquire data in spartan 3e board in mega samples rate can you post me any examples for this purpose

[tannerite]

Hi,

Are you successfully sampling at a specific rate currently? If so, what is the sampling rate? Also, what frequency do you want to be able to sample at and are you reading from a digital line on the Xilinx board?

Best,

tannerite

[BradM]

If you're trying to get analog samples in that range, the issue that you're going to run into is that that sort of sampling rate is right at the bleeding edge of what you're asking for (it's a 2-channel @ 1.5Msps chip, the LTC1407A-1). If you actually want to capture at these rates, you're going to need to pull some interesting LV-foo using single-cycle timed loops in the FPGA diagram or drop some code down into an IPNode/CLIP Node, with outputs from those IP blocks hooked to the IO in a SCTL.

Please let us know a bit more about your specific design.

-Brad

[ErnieH]

I would post some code, but unfortunately professional programmers are not allowed to use the lower priced hardware with the software they have purchased.

[BradM]

Correct, the Spartan 3E is only intended (and licensed) for use with use with LabVIEW for academic users/institutions.

[discussion_forum · Accepted solution]

Up to now I success to get sampling rate in Kilosamples but megasamples requires complex code