memory item as shift registers

[nmbernardo]

Hello, I am new in LabVIEW Programming. Can I use memory item to make a large array of shift register inside a SCTL in LabVIEW FPGA? Large array of shift register consumes a lot of slices when i compile it. Can data be read and written(in different addresses) on a memory item in a single clock cycle? thank you

[Dragis]

I am not sure I understand exactly what you are asking. If you are trying to use a Memory to implement a shift register you can certainly do that but I would recommend using a FIFO instead.

If you are trying to use an Array, Loop, and Shift Register to implement a memory that will work as well. Note that only LabVIEW FPGA 2012 and newer can infer block ram from this construct. In older versions the array will always be implemented in the standard FPGA logic using registers and utilizes more resources.

The above diagram will infer a block ram for larger array sizes.

Either way, the read and write addresses do not have to be the same in each clock cycle.

[nmbernardo]

Cool. Thank you! I will try this. 🙂