memory usage doubt on re-entrant VIs

[Sreedhar_T]

Dear all,

I have a doubt in VI execution. Hope you would be able to throw some light on it.

Assuming a situation where I have 4 different VIs, viz. B.vi, A.vi, C.vi, and Main.vi.

B.vi is a subVI to A.vi and A.vi is a subVI to Main.vi

Main.vi is made re-entrant with the option: "Share Clone Between Instances" being considered as LabVIEW recommends doing this will consume lesser memory.

Now, if Main.vi is called inside different VIs which will run simultaneously in my application, would there be different clones of A.vi and B.vi also whenever a Main.vi clone is created ?

I would like to know more with the aspect of loading the CPU Memory and its usage.

Hope I was able to put my point forward.

thanks

Sreedhar.

[RavensFan]

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Sreedhar T wrote:

Dear all,

I have a doubt in VI execution. Hope you would be able to throw some light on it.

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You don't believe that VI's will execute?  Or do you mean you have a QUESTION about VI execution?

Take a look at these links.  They may shed some light on your question.

Do all the sub VIs in a reentrant VI need to be reentrant?

Differences Between Reentrant VIs (Preallocate), Reentrant VIs (Share Clones), VI Templates, and Dyn...

My reading of these is that there are NOT different clones of the non-reentrant subVI's.

[Sreedhar_T]

Actually I wanted to know about the memory allocation in the case I have provided.

All I want to know is: Will the memory allocated to A.vi and B.vi be cloned when ever main.vi is called.

Probably I will get an answer in the links you have sent.

Thanks and Regards

sRee

[JDubb007]

Hi,

     I'm having a problem when I set a Sub VI as re-entrant.  In my appication, I'm attempting to instantiate a Sub VI in my top level VI seven times. The functionallity of the Sub VI is pretty simple (or so I thought); it uses two while loops and a sequence.  In the nested while loop I just sit and wait for a rising edge then increment a count on each edge.  Once my count reaches a certain value, I pop out of that loop then the second frame in my sequence executes and increments separete counter.  The main while loop forces this process to execute again. I pass controls and indicators through the VIs using Local Refernces.

Problem

   If I run my top level VI with the Sub VI set as a non-entrant then my CPU usage is ~32%, which is pretty high considering it's 8-12% w/out any of these Sub VIs running in my top level code.  Once I change the VI Execution Property to re-entrant, my CPU usage sky rockets to 100%!!!!  Initially I thought it may be due to changing this property, but I have other Sub VIs in my code that are set as re-entrant and they don't affect CPU usage.  The difference b/t that Sub VI and this one is that I am using a while loop here.  My other Sub VI doesn't have any loops at all; it just checks the limits of an incoming waveform.

I'm an FPGA guy and fairly new to LabView so I'm still trying to transition my mind to the software world.  When writing in VHDL, if I instantiate a module several times in a top level file, I'm basically creating a duplicate circuit inside the chip and driving different signals through it.  Based on the support notes, I've read for re-entrant VIs, I got the impression the re-entrant setting allows you to do a similar task in LabView.  I thought that perhaps since I was using a while loop, LabView was trying to excucute every instantiation as fast as the CPU allows, but I get the same performance even after placing a wait 1000ms block inside both the while loops.  Is the re-entrant VI the correct setting for this application or could the problem be due to the while loops running in the Sub VI?

Thanks