point by point FFT

[tlin067]

Hi there,

I am using the FFT alsorithms on the FPGA interface to calculate the cross correlation of two signals in hardware. I do not seem to be getting the correct response so I broke the problem down to see whether the FFT of a signal that was calc on the FPGA is the same if the signal was transformed in windows.

The two are not the same. I understand that the FFT on the FPGA is calculated point by point.... but I am worried that I may not be looking at the right data in my comparison as both plots should be the same!

The output of the FPGA FFT also varys every time I run the code. I have simulated signals of lots of formsa (sin, square, noise etc) but can't seem to make any sense of it. 

I have attached screen shot of my code and output. If anyone could help me out it would be great.!!!

Cheers

[Andrew_E]

Hello,

What version of LabVIEW are you using to program your fpga code? 

[tlin067]

I'm using labview 8.6. The main prob i think is trying to understand what the output of the FFT is.... I tried understanding the help but am a little confused.

[Andrew_E]

Hello,

There is actually a great resource to understanding FFT and how to use them in LabVIEW at you fingertips through this tutorial.  Its only 20 minutes and i guarantee its the best way to get to know precisely how the fft works with your code. There is also a couple of other resources you could use here and here to get started, but these won't garner the additional teaching that this interactive tutorial will provide.

[rpursley8]

There is a latency associated with the FPGA FFT.  Because of this, your output data may be shifted (the displayed point 0 is not really point 0).  There is another output that tells you where you are in the sequence.  Also, I can tell for sure from your diagrams but are you definitely using the real part input and the real part output in the FPGA FFT?

[tlin067]

Thanks very much for those tutorial's. Was helpful as a background but my real problem is just trying to perform the FFT in hardware on the FPGA. I understand my output's and input's arent quite as they should be at the moment but I am basically trying to get it to compile. Is there a way to access how many flip-flops/multiplications a FPGA FFT algorithm uses? and how many are available of the FPGA?

My code will not compile if I only have 2 FFT's passing into 2 DMA FIFO's.... If this is the case then the necessary processing i wish to achieve on the FPGA seem's a little impossible! (is it right that a target to host FIFO will not use up any memory on the FPGA as it is direct memory access??)

I could create sub VI's to reuse memory allocations but the whole point of this project is to perform parallel computation. However this may not be possible .

Any idea's?

[Andrew_E]

Hello,

The best way to find out how many flip-flops your particular FPGA FFT algorithim uses would be to compile a basic fpga vi with only that in it. Then see how many slices that the vi uses. This will also tell you how many slices that one FFT uses and also how many you have available. This is in the compilation report after you compile the fpga vi. To answer you question about DMA Fifo's, although they are direct memory access they still use Block Memory which uses the available embedded RAM of your RIO device to store the information. The maximum size for example of a FIFO for the 9103/9104 is (196,608 bytes - 16 Kilobytes ((Memory Read and Write Functions)) = 180,608 bytes). That is the maximum size for the 9103/9104, but if you have a different CRIO, then you may want to look at what the available embedded RAM is for your Real-Time system.

Regards,

Andrew Eddleman

National Instruments