I have a problem with a VI. I need your help.
The VI has a while loop that cycles every 200ms. In the while loop is a 'write to digital line VI' whose line state is connected to a local variable (fan)from a sub VI in the while loop. The sub VI is a case structure that excutes one of two subdiagrams depending on the values of two inputs. Each subdiagram controls one digital output. The subdiagrams are almost the same except one uses a 'greater? compare' and the other uses a 'less? compare. The true case that uses a 'less? compare' works properly. That is the output latches until the next iteration brings a different logic value. However the false case that uses a 'greater? compare' is acting strange at the hardware a
lthough the software probe shows proper functionality. In other words, the probe shows that the output of the 'greater? compare' latches to the value of the result until the next iteration introduces a different value. A scope at the output terminal, however, shows that the output is normally low and only momentarily pulses high when the output is true or 1. And the pulse is so brief that it cannot turn the device on.
Any idea what is going on?
