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why after generating a sine for some time, i get broken sines on the oscilloscope?

hello every body
i am generating and then adding two sine signals with parametrs (freq, amplitude). i am passing this addition of sine signal through channel zero . through channel one i am generating one other sine signal and after using build array function i am passing it to channel one.
i am using board AT-MIO-16XE-50. the problem is for some time i see the smooth generation on the oscilloscope and some times after 2 minutes, sometimes after 5 minutes i see the strange wave but not the sine wave on oscilloscope.some times it crashes after 5 minutes. some times it crashes on channel zero and some times on channel 1. some times on both of these channels both signals crashes. this is not a deterministic behavior but some strange behavior. why is it like this?
the other problem i am facing is when i break or stop.it must send immediately a zero volt to oscilloscope. even after pressing break or stop buttons, i get some volts of signal on the oscilloscope? why these break and stop buttons immediately stops the signal when pressed?
i attached my VI.
thanks for the help.

With regards
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sorry i correct my last sentence. why not the break/stop immediately sends or trigger the voltage level zero. why there is still some voltage flow at the output channel? how can i bring this level to zero when i press stop or break buttons.?
thanks
regards
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Hello Hood1,
did you already take a look at the examples that are shipped with your LV distribution?
There are a lot of examples for the analog output.
Does these examples work correctly?
Best Regards
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hood1,

I have a few suggestions. First, though your code is quite nice in many respects, you have made a crucial mistake regarding error handling. With your current approach, an error could occur (and probably is occurring) with an analog output operation, but the while loop will not stop in response, and the error is not being passed to the next iteration of the loop using a shift register. As a result, any errors that occur will simply be ignored. This probably accounts for your nondeterministic "strange behavior".

Two general approaches to correcting this problem are:
1. Make the while loop stop if an error occurs. Check out the shipping DAQ example "Cont Acq&Chart (buffered).vi" for one example of how to do this; it's a simple matter of unbundling the error cluster and adding another "OR" operation to your loop-stop logic.
2. Display the error to the user, but allow the loop to continue. This approach requires that you replace your tunnels with a shift register, and pass the error from one loop iteration to the next iteration.

Neither of these approaches will correct the problem, but they will give you feedback on exactly what error is occurring, which will help you correct it. With an older ISA bus board with no FIFO or a small FIFO, the top speed for analog output is pretty low, so I suspect that you are getting a -10843 error or something. It might not be easy to correct without getting a new piece of hardware.

As far as the "stop immediately" problem goes: you have coded the VI so that it will always continue for one extra cycle after you click Stop. The reason for this is dataflow: the Stop control will likely be read at the very beginning of the loop iteration (when its value will almost certainly be False); in parallel, the analog output operation will begin, and it will take some time. So, if you click Stop in the middle of one output operation, that new boolean value will not be read until the following loop iteration, meaning that another full output cycle will always occur.

One simple way to fix this problem would be to wait to read the value of the Stop button until after the analog output case is complete. You could put the Stop button in a single-frame sequence structure and wire something into that structure from inside the analog output case, and that should help.

Regards,
John
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