Generating a 250usec delay using Lab Windows/CVI

[pramad]

We are using CVI in conjunction with the NI DAC card. We need to generate an accurate 250usec delay in order to modulate a DAC output. So far we have been trying to use the Host PC's system clock but this has proven to be very unreliable due to the overhead usage by Windows NT. We have also tried to use the free running clock on the NI DAC card by setting up the FREQ_OUT line with a 100KHZ time base and looping it back to a DIO line. By doing this we thought we could count edges (25) to give us an accurate 250usec timing. But again, due to the overhead associated with checking for the leading edge on the DAC line using the Lab Windows API functions, we are missing edges and are not even close to getting a 250usec timing. Is
there a way to set up an interrupt to count 25 leading edges and set a status bit which we can poll? We have not been able to find any documentation related to this. Need suggestions to other approaches. Need help fast.
Thanks.

[Chris Matthews]

Yea, Windows system timers only have a resolution of 1msec, so software timing is out. You would probably want to do triggered analog output. You could generate the trigger using the counter on your DAQ board. Set up the counter to generate pulses every 250us, then use that signal as a trigger for your analog output. You will find pulse train generation and triggered analog output examples in your cvi\samples\daq directory (WFMsingleBufExtTrig_Eseries.PRJ and STCgenerateRepeatedTriggeredPulse.PRJ are most likely right for your board if it is E series).

You can also consult the Multifunction DAQ section of this site for more in depth assistance with DAQ. That section is ER=3&RHIDETAG=TRUE&UCATEGORY_0=_30&UCATEGORY_S=0>here.

Best Regards,

Chris Matthews
National Instruments