FPGA BCGLookup VI

[ChristopheC]

To access the FPGA, the VI MUST run on the cRIO. You can't have a VI that runs on the Host computer access the FPGA of the cRIO. So you can't just drag and drop it, and have it run on the host PC and expect it yo work.

If you want to control the cRIO from a VI running on the host computer, you have to use VI server:

Open a VI reference by specifying the system IP address, and VI path with the Open VI reference VI, and then you have access to a lot of different methods and properties to run the VI, set controls, read indicators etc.

You could also use the same method I just described to open and run your Smart Camera acquisition VI from the VI running on the cRIO. I don't know if this is what you used to get it to work.

Other technologies available to control the cRIO VI from the host computer is to publish it using Web Sserver. You need to install that part on the cRIO, then right click on the cRIO target in the LabVIEW project and enable Web Server.

You can then view the UI of the VI in a browser on the host PC.

Check out this example:

http://www.ni.com/example/26799/en/

Hope this helps.

[dalyto]

hi

yes i use  VI server to run smart cam vi on the host computer vi .

why i can desply the image from fpga on the host computer VI and i can read and write  fpga with Read/Write Control Function and i can desplay resulet of mathematical function (sum, multiple, comparing numbers) on the host computer  vi but i can't desplay histogram or i can't  BCGLookup VI neither with Read/Write Control Function or fifo from the host computer ??

and how i can send the image acquire from my smart cam to RT fpga VI   on the  host computer vi with with VI server ??

i can do each Vi( smart camera vi and rt or fpga VI ) with  VI server  but i want do in the same time on the same VI 

thanks for help 

[ChristopheC]

A VI running on the PC simply cannot access the FPGA of the cRIO.

You can get the acquired image because the image is published by the VI running on the Smart Camera and does not require any FPGA access. By changing the VI from the cRIO context to the PC, the shared variable still knows that the source of the image is the Smart Camera. The FPGA is not involved.

Debug the VI, you'll see that when running it on the PC, the FPGA functions should return errors.

I don't fully understand your architecture. Why do you need a VI running on the PC?

[dalyto]

My end of study project is to acquire image with  The NI-1742 smart camera and send this image to fpga to have the histogram and BCGLookup of image and other test for image in fpga , i must acquire the image with the NI-1742 and processing with FPGA

SO how i can have connection between the NI-1742 and fpga on cRIO 9068 ??

[ChristopheC]

I sent you an example code on how to do that yesterday.

Combine that with the RT VI you started working on and you have your solution.

[dalyto]

yeah i know and thanks for that

but how i can Combine between RT and the NI-1742 in host computer vi ??

[ChristopheC]

What is the purpose of the host computer VI?

[dalyto]

opps sorry

this is my main VI i can run the smart camera VI and deploy the image but after that i don't know how ?? i don't know how to send the image  and run RT VI ??

[dalyto]

hi 

thanks for helep

now i can acquire image with NI-1742 and have the histogram under fpga in the same time

in my computer Vii and  i run the smart camera vi and i put the image in shared variable  after that i run my FPFA VI

I have a question if i used the function IMAQ FPGA Histogram VI to get the histogram , why it does not worked ??

this is my vi 

thanks for help 

[ChristopheC]

What you attached is the FPGA VI. I don't see anything wrong with it. It's hard to tell without seeing the entire project.

I understand that you run the main VI you attached in your previous post on the PC. That VI only gets the image from the smart camera and displays it in the image display control. I don't see any code that sends that image to the VI running on the cRIO, and then to the FPGA.

Again, I don't understand why you want to run that main VI on the main PC. You can call that same code on the VI running on the cRIO and it will work. Once you get the image from the Smart Camera, you need to send it to the FPGA for processing.

You have all the pieces. You just need to put them together.