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LVDS intreface of PCI-1422

Hi,

 

I'm developing FPGA device(for scanning electron microscope) which should simulate video camera  and interface to PCI-1422 for sending video data to PC for later view, and processing. I cant find anywhere protocol description how "LVDS parallel video camera interface" signals work. The physical payer (LVDS) is known. But how this parallel data has to be sent to be understandable for PCI-1422?

 

May be someone from NI can help with this info? 

 

 

 

 

 

 

 

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Hi InraRed,

 

Perhaps this is a good starting point: http://zone.ni.com/devzone/cda/tut/p/id/3287

Stephen Meserve
National Instruments
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