Storing an image in DRAM on an FPGA

[mesolmaz]

Actually, when I create a new project, add NI-1473R as the target, it gives me access to DRAM. However in my current project (10-tap 8-bit Camera with DRAM), it doesn't give me access to DRAM. I think the reason may be using the CLIP interface to store data for fast camera aqcuisition. 

[AmitShachaf]

Hi,

I am working with NI 1473R-110 and is moving now to program on the NI PCIe-1477.

The new card 1477 has more NI function and examples.

NI have one example that they are doing back ground subtraction on the 1477.

Issue is that many of  the new functions are working for the 1477 on multiple Taps. But on the 1473R-110 this functions are working only on stream of pixels of 1 Tap.

I have VI that will store images on the 1473R-110. I am currently working with CLIP memory.

Is that what you want to do?

Maybe it is better for you to switch to the 1477 then you could use the NI supported example.

[AmitShachaf]

Look at the example "Flat Field Correction on FPGA.lvproj"

You could use the same technic.

[mesolmaz]

Hi Amit,

Thank you for the answer. As you pointed out, none of the examples work with 10-taps. My project requires very fast image acquisition and as far as I remember the examples did not even work with 8-taps. Currently I am not able to purchase 1477, so I have to make this work. 

I was thinking of changing DRAM from FIFO to Random Access. This way I can control the which bank to use. I was not able to use CLIP to access memory or store an image. Can you please share if you were able to do this? How do you access the image?

thanks,

Mehmet

[AmitShachaf]

I am using the CLIP as a FIFO in my project. You can do Random access.

To Create CLIP memory:

1. Right click on the FPGA and select "Properties"

2. Select "DRAM properties"

3. Select the MODE to "Socket CLIP"

4. Select the Top-Level Clock

5. Configure the Clock to 100MHz.

6. Do the same for Bank0 and Bank1. That will create 2 Socket ClIPS

[AmitShachaf]

I forgot to add some steps after.

7. Right click the Socket CLIP created and select "Properties"

8. Select "Enable DRAM"

9. Select "Random Access - 128Bit

10 Select the Clock to 100MHz

[mesolmaz]

Hi Amit,

I have already done this. But 10-tap 8-bit camera example uses DRAM as a FIFO and this changes the Vi quite a bit. Now I need to add addressing to the flow.

Is storing an image in Socketed CLIP the same logic as using DRAM as a memory? 

[AmitShachaf]

I haven't tried using DRAM as addressable. In my code I am using the CLIP as a FIFO.

I assume you will be using 64Bit address and 64bit data. But I haven't tried it.

I can share VIs to use it as a FIFO. But I need to try building it for random access.

Could you please remind me what are you trying to do? Is it for background subtraction? 

[mesolmaz]

I am trying to do background subtraction. 

As far as I know, you cannot use the DRAM addressable if you are using it as a FIFO. Right now, I am trying to write data to DRAM as a Socketed CLIP (instead of memory).