I am using a system with 4 PCI 6110 (16 channels). For reasons regarding a complex triggering, the ADC clock was rebuit using a full PCI 6002 and the 2 counters on the 6110. The problem is that using NIDAQ 6.5.2, and LV, the ADC accepts this clock ONLY from PFIs, and not from RTSI, as written in the board documentation AND on the help (specific for 6110) given with the NIDAQ 6.5.2 LV support. This requires a non-elegant external wiring on PFIs. I tried also the trick of using high-to-low front, and does not work.
With NIDAQ 6.7 the clock arrives fine on CONVERT from RTSI, as expected, but the data transfer is 2 times slower between two buffer readouts (AI-Read, same program)!
What to do?
I'am afraid NI-DAQ 6.9 may be even slower.
To keep those ugly wires and 6.5.1 which does not route well, but is faster?
Waiting for a suggestion,
Thank you.
