AnalogMultiChannelReader and AnalogMultiChannelWriter in C#

[Alok Damle]

Hi,

It seems my wuestion is so silly that nobody replied to it. However i am taking one more try to see if somebody can help me with this. Attached is the C# code for what i am trying to do. The Issue is simple

I have a PXI chasis with a 4461 Card in its slot 2. I have connected the AI0 to AO0 and AI1 to AO1 using a physical cable.

What i am trying to do is to write simulteneously to AO0 and AO1 and read from AI0 and AO1. the data is approx 204800 values.  In the following code I am not getting the read callback.

I tried similar in another application and there i was getting the read callback (by making the Synchronizecallback = false) but was having some different problem. I have posted it previously.

I wrote this fresh application but in this case i am not even getting the read callback.

I have tried changing the synchronixedcallback value to true and false both.

Please tell me what i am doing wrong.

Regards,

Alok Damle.

[Alok Damle]

Seems the problem is solved. the culprit was the while loop. Removed it and everything started working fine. Now have to check for the delay. The srite data is starting after some delay after the read starts.

[BrowningG]

Hello Alok,

I am glad you were able to find a resolution to your issue.  There are numerous shipping examples included with DAQmx.  Check out the example MultiFunctionSyncAIAO_DigStart as well for synchronized AI and AO.  Hope this helps.

[Alok Damle]

Dear Browning,

Thanks again for your reply. While trying to figure out the problem with the delayed read, I found that 446x has some filter delays in reading and writing. Now here is something interesting that i figured out and would like to know if there is a solution to this.

Assuming 204.8 kS/s the read delay is 63 samples and write delay is 32 samples. Now since i have connected AO of the 4461 to AI I expect the delay to be 63+32 that is of 95 samples.

Now interestingly there is additional 2/3 sample delay that is coming for all possible combinations. In the above case the actual data is starting after 98 samples. I exprimented with following settings.

Read 204.8 kS/s and write at 51.2 kS/s. as per the specs, read delay should be 63 samples and write delay should be 42.3 samples

since read rate is 4 times write, I assume the final delay should be 63 + 4 * 43.2 = 235.8 samples. In this case the actual delay registered is 238 samples again 2 additional samples.

Similarly i tried other combinations and there is a delay of additional 2/3 samples.

The problem with the application is that i need to know exactly whether it would be 2 samples additional or 3 samples additional so that i can compensate for the same while interpreting the data. Is there something specific regarding the cards behaviour that i am missing on?

Regards,

Alok

[BrowningG]

Hello Alok,

You are correct, there is a delay introduced by the filter on the input and output channels for the 4461.  While there is a specified delay in the spec sheet for the 4461 there can be other sources of delay.  These delays are deterministic and can be compensated for. 

If you are performing a test that requires the propagation delay between AO and AI, you can calibrate these values out.  At a specific combination of AI and AO sample rates the propagation delay will remain constant.  As you change the sample rates, the overall propagation delay will change, but will remain constant for that sample rate.  As a result it is possible to measure this delay and calibrate it out.  The Sound and Vibration Toolkit includes VIs for doing this, but it looks like you created a method for measuring this delay yourself.  Please note that the number of samples will not always be an exact integer. 

[Alok Damle]

Dear Browning,

So now I will experiment out with all the possible combinations that my application would require and will fix the delays.

As per the documentation I also found that the delays could be in terms of non-integral samples. However but since we would be reading the samples which are finally related to sample clock, I think i can only compensate the samples in integral form. Is there a way to compensate for the sample in non-integral way?

Regards,

Alok Damle.

[PBear]

Hi Alok,

I'm trying to understand what you are trying to do with your device so that we can figure out what the root problem is. It sounds like you are doing a simple loopback test and expecting that each sample that is output is exactly the same as what is input at that example sample time. Is this correct? There is going to be delays due to length of the signal path for the Analog Output (internal and external). If dealing with multiple DSA devices and synchronizing inputs, compensating for the filter delays is necessary. In your case, without further information, I'm curious as to what you need compensated and what indeed is the issue.

[Alok Damle]

Dear Patrik,

You are corrct in guessing that i am currently doing a loopback test with a 2 mtr cable. So i have been experimenting with various combination of scan rates and update rates and was trying to establish the relation between the filter delays that should happen as per the spec sheet of 4461 and what is actually observed. This would be necessary because when running the actual instrument, i will have no way to determine the exact delay as the Analog input coming from the actual instrument cannot be guessed and cross verified.

By your description it seems that even if i experiment and find the exact delay that is occuring at the loopback, this may change when i connect the actual instrument? if that is the case then i have more than system caliberation to perform when running my application with the instrument for the first time.

By the way the instrument in picture is a High Resolution Mass Spectrometer. Hence i need a good accuracy as well as highest possible scan / update rate. an Update / Scan rate of 500kS/s would be ideal but i did not find any card which has 18 bit or higher resolution of AO and the said update rate. Hence trying to compromise with the DSA. however it seems there is more than direct synchronized read / write that i need to perform when using 4461.

yesterday i got to also know that the DSA has very poor accuracy but since it is linear in nature i can compensate for the same in software while calibertion. but now instead of a quadratic interpolatoin i might have to do cubic interpolation. that will confirm only after I run the test with the real instrument which is still under production.

By the way something off this post, I am facing a good amount of noise in the loopback test. Can you at least confirm whether the noise is getting added while reading or while writing or at both the time?

Attached is the result of AI0 looped back with AO0 and AI1 looped backed with AO1.

Regards,

Alok Damle.

Message Edited by Alok Damle on 04-09-2008 11:29 AM

[PBear]

Hi Alok,

If you know the delay during a standard loopback (which it sounds like you've been able to do), you can calculate the delay of your instrument by simple subtraction. The board and filter delays will not change when the instrument is attached. The DSA device is very linear in it's response and is ment for analyzing AC signals and thus does not have exceptional DC capabilities. I looked at your picture and was seeing an inaccuracy of around .3mV. Being set on a 20V range, this is very good performance. You're correct in thinking that these small noise fluctuations are caused by both the read and write circuitry (as well as environmental conditionas) and this will be the case for any device. I'd also like to point you to these documents that could shed some more light on the functionality of your board.

Absolute Accuracy of Dynamic Signal Acquisition Devices
Absolute Accuracy and Flatness on DSA (Dynamic Signal Acquisition and Analysis) Products

Again, I'm a little confused on your application. If you simply want to calibrate the propogation delay of the card, it sounds like you have done that. With your instrument attached, you will have a longer total delay but the card's delays will be known and you can then factor them out.

[Alok Damle]

Dear Patrik,

Following is the current state of affairs.

1. I am now fine with the delays as now i am compensating for them in software hence the synchronization issue is taken care of

2. The inaccuracy of the card is also fine as i can compensate for the same while calibrating

The thing which is bothering me is that when we say 24 bit resolution between -10V to +10V, it boils down to minimum possible voltage step of 1.1 uV. now assuming that the DAC and ADC inaccuracies is near 2 bits. So that would mean that the delta signal should should be at least 4.4 uV. Cause for this range you tell me that the noise of 0.3mV peak to peak is fine??? and with the noise in range of 0.3mV, a step change in the range of 4.4uV is meaningless!

Here the only thing i do not understand is how to generate voltage in -10V  to +10V with 22 bit accuracy if that is the resolution claimed for the 4461 DSA.

I dont know whether i am doing a blunder in fundamentals, but can you please explain me if that is the case??

Regards,

Alok Damle.