02-23-2009 12:41 PM
Our test program is using port 0_16, and is not using port 2. That said, ACK2 is not connected to anything, and REQ2 is looped to P0.4.
If the breakout box is not present, then neither are our loopbacks; can we rely on floating inputs to the 6533 to float low, or is their impedance high enough to make that an unsafe assumption?
02-24-2009 10:46 AM
Regards,
Dan King
02-26-2009 05:41 PM
03-04-2009 04:52 PM
Hey Ron,
Check out the following Knowledgebase documents:
- How Are the ACK and REQ Lines Controlled on the 6533/6534 DIO Devices?
- How Do I Reverse the ACK and REQ Pin Assignments for NI 653x Devices in LabWindows/CVI?
You can also check out the following example code: 653x Bidirection Bust Mode I/O in DAQmx
Most likely you are running into the issue mentioned in the first KB above. Have you tried to communicate between 2 different 6533's to see if you can get the communication working that way? Let us know if adding extra clock pulses helps or not. Thanks, and hope to hear from you soon.
Regards,
DJ L.
03-04-2009 06:11 PM
The KB you mention assumes an external clock, which we aren't using; we're using ConfigureHandshakingBurstExportClock. The problem still occurs if we use ConfigureSampleClock.
In both cases, the 17th sample is not generated if we write at least 20 samples. This occurs at any sample rate (we tested down to 1000 S/sec). The only difference between the modes is that with burst mode, the failure is a timeout on WaitUntilDone (-200560), whereas with sample clock mode, the failure is a bus underflow error on WriteMultiSamplePort (-200621). In both cases, an oscilloscope verified that the final sample was actually generated.
Interrupt mode works, but won't approach the sample rates we need.
Thanks.
07-16-2012 08:34 AM
Seems like I am running into exactly the same problem. Has a solution been found already?