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Configure PCI 6221 Analog Input (AI) clock

Hi,

 

This is my first time using the forums so if I don't provide the correct details to properly answer my question, I apologize.

 

I have a PCI 6221.  I am acquiring a single channel analog waveform. The purpose of the program is to acquire data off a board that is showing resulting analog voltage based on two digital triggers.  That is I cycle two digital outputs between high and low over a user-defined time between 1 to 100 ms, and acquire data through Analog Input.

 

Now I have a few questions.  1) How do I configure the analog input so that once user wants to begin acquisition, i acquire?  The way I have it now is that I configure the Digital lines and then configure the single analog output, start task and then enter two while loops: 1) Acquisition Loop and 2) Digital Cycle Loop. Once the user decides to acquire data (A Boolean on GUI), I start my digital cycle and begin reading from the analog channel.  The errror that is occuring is that the resulting data has four or five seconds of data for no reason. Its before digital lines start, so its zero.  But once I start acquisition, the graph instantly shows 5 seconds of data.  And if the user waits to long to start the read, it might error out as the buffer might have too many samples. The way it should react is once user decides to acquire data, the digital lines are changed in its own loop and the acquisition loop should follow the results in real time.  I am wondering if I should add a trigger or a wait in the acquisition loop. I have tried configuring the clock, but that is not working. 

 

Secondly, I have the sample rate at 250Hz. The cycle of digital lines occurs at between 112 ms Max or 12 ms max.  I'm building a waveform and wondering how should I correlate sample rate and samples/per cycle to have it show one cycle of the change of digital lines.  That is knowing the time of digital cycles, how do I set the sample rate and samples/second read.  

 

I included a power point presentation that thoroughly explains all this better and some of the VIs.  The power point presentation includes what one cycle will look like, the configuration of AI channel, the main test VI I use, and the resulting data with a close up of the graph.

 

Powerpoint presentation is in  Optical_July8_09\NOTES\Acquisition Loop.ppt

 

 

I included a zip file of my entire program.  The Main test.VI that I use is in directory Optical_July8_09\Test VIs\Test_Acquistion_TTL_Loops.vi

 

I hope anyone can provide some help. Thank you.  

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