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How to sync cDAQ Analog inputs off different modules

Hi,

 

I am facing the following problem: I have an NI9225 and an NI9215 in the same cDAQ-9174 chassis. I have realized that when I perform a mesurement at 5kS/S there is about 10ms delay between the measurements of the modules (so all the channels of the 9225 are in sync with each other, all the channels of the 9215 are in sync with each other, but the channels of the 9225 and the channels of the 9215 are shifted with about 10ms).

 

As I have done the measurement: I have created virtual channels for each AI in MAX, concataneted them in LabVIEW (separated with commas), and wired the string to the Sample clock VI.

 

I also have realized that this 10ms delay can be reduced to about 2ms if I increase the sampling rate to 50kS/s (which is the max of the 9225). Now this 2ms is still somewhat disturbing and anyways 50kS/S is an overkill, 5k would be enough.

 

How should I write my VI to sync the channels of the two modules perfectly?

 

Thanks in advance.

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The problem probably relates to the input delay of the NI 9225: http://digital.ni.com/public.nsf/allkb/F989B25FF6CA55C386256CD20056E27D

 

The calculated value matches pretty well with the error I see. Now another question arises: if I sample the signal at 50kS/s, the signal seems to have a lot more noise (and when I say a lot, then it is a LOT). Any logical explanation to that?

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Hi 1984!

 

We spoke on phone, but I will tell the solution here to, so others can learn from your question.

 

The reason of the noise is the following:

 

If you use DSA devices, you use sigma delta ADCs. The benefit of these is, that they filter all signal after the Nyquist frequency.

If you increase the sample frequency, the Nyquist frequency will increase too, so more signal components (noise) will be measured.

 

This causes more noise, especially if you measure in a noisy environment. You can get rid of the noise, with averaging or filtering.

 

Best Regards,

CLA, CLED
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