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PXIe6280

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Hello!

 

We are sending data at the port0 with 10MHZ frequency using the 6280 PXIe.

 

We are trying to test A DUT with this port0 with a specific rate up to 10 MHZ at the same time in the same

VI we are trying to acquire anolg data AI0 (differentiale) but with limited frequency up to 250KHZ ADC Maximum sampling rate.

May you have a VI that we may use? is it possible to do that in the same VI?

 

Many Thanks,

Yenass.

 

 

 

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Accepted by topic author yenaslab

Here.  I basically just extended the earlier example I posted for you in another thread (Note: over there, I somehow lost a wire connecting CO.Pulse.Term to the 'source' input of the DO task's call to DAQmx Timing.vi between testing and posting.  It's fixed below.)

 

Of note when including AI:

- I specify the sampling clock indirectly by defining both the Timebase to use and how much to divide it down.  This lets me sync to a clock that's faster than AI sampling will support.

- I make sure to start DO and AI first, then start the pulse train.  This will keep the DO and AI tasks in sync.

- I made a note that you should enqueue the AI data rather than trying to do anything with it inside the DAQ loop

- the DAQ loop is timed by requesting 1/10th sec worth of AI samples per iteration.  It will iterate at an average of 10 Hz.

 

 

-Kevin P

 

M_Series_CDO_and_AI_with_CTR_Sample_Clock.png

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Hello Kevin!

First of all I would like to thank you for your useful replies.

 

Just As I understood from the design below the followings:

 

1.Using the counter Channel as clock is to synchronize the Writing of the DO with the AI aquisition.

2.We can send 1bit clock up to 10MHZ using the counter channel to the 1bit digital output.

3.We can send 8bit data on DO clocked up to 10MHZ.

4.We can acquire the AI (Voltage AI0) with the same clock source but with f/10.

5.So if the maximum sampling rate is limited to 0.25MHZ we are obliged to divide by 40 if we are sending data with clocked outputs @ 10 MHZ.

6.I made a note that you should enqueue the AI data rather than trying to do anything with it inside the DAQ loop: This is to speed up the processing so that we can enqueue the voltage measured samples one time then we can write them in a file outside the loop.

 

Please let me know if I well understood the VI and the functions offered by the VI sent by you.

Thanks,

Yenass

 

 

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Accepted by topic author yenaslab

Yes, 100%.  Everything you stated shows that you understand correctly.

 

 

-Kevin P

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Hello Kevin:

Thank you very much for your replies.

 

In fact, We modified the VI you sent to make it compatible with our application.

 

Our application is about to test a DUT with 8bits inputs data using the Clocked Port0 on the PXIslot with

frequencies up to 10MHZ + 1bit clock signal up to 10MHZ shynchronized with the data on the digital outputs.

At the same time we are intrested to aqcuire the voltage when the data starts to come to the DUT to see the effects

of the data on the measured voltage values.

 

As You can see we send at each T=1/f where f=5MHZ for example a one byte data 8bits to the Port0 connected to the DUT,

and this DUT is clocked with a clock signal sent from the counter output.

 

As the sampling frequency is limeted in the case of differentiale voltage to 0.25 MHZ so we acquire at each Ts=1/fs where fs=maximum sampling rate = 0.25MHZ on the PXI6280.

So here I am little bit confused concerning the division by 10 , and when you feed the reading block you are feeding by the number os samples but not the sampling frequencies?

 

In fact what we need is to see the voltage difference while we send the bytes we have 4096 bytes in a file, and this bytes are sent to the DO @ T=1/f where f=5MHZ.  so in this case we need to see the samples of the voltage difference during the 4096 bytes sent to the DUT.

so for this purpose it is correct if we say t=4096 bytes * 1/fclock we get the total time we need to finish the sending of the 4096 bytes. and we can acquire each Ts=1/fs one sample measurement so we need to have Ns=(4096*fs)/fclock samples that represents the progress of the voltage difference during the 4096 bytes sent @ fclock=5MHZ?

 

Thanks,

Yenass

 

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1. I'm still on LV 2016 and can't open your latest code.  Can you do "File-->Save for Previous Version..." back to 2016 or earlier?

 

2. The place where I divide sample rate by 10 is for a simple purpose -- to ask for data in 1/10th second chunks.  This was based on assuming a need for continuous acquisition. 

    If you're going to generate only 4096 DO samples at 5-10 MHz, you'll probably be switching over to Finite Sampling mode on the DAQmx Timing calls and you won't need a loop for collecting data continuously.  You can just get it all in one call at the end of the capture.

 

3. I had a hard time following your last paragraph.   Let me try to restate what will be true of the timing relationships.

 

DO time = (# samples / rate) = (4096 / 5 MHz) ~= 0.819 millisec

 

For AI sampling at 250 kHz and counter clock at 5 Mhz, the divisor will be 20.  So the # of samples you'll get during this time will be approx (4096 / 20) = 204 AI samples.

 

I'm not sure offhand whether the 1st AI sample will occur at the 10th or the 20th DO sample, so it's possible you'll get 205 AI samples instead.

 

 

-Kevin P

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Hello Kevin!

 

Thanks for the reply.

 

Here is the VI.

 

The idea is what we need is to have measured values with the maximum sampling rate 0.25MHZ during the sending of the data @ The DO 

The DO we are sending 4096 samples 1sample=1byte sent to port0 clocked @ 5MHZ to the DUT +1bit clock (counter channel as clock) to clock the design.

During the sending of the data of 4096 samples @ 5MHZ we need to write the different measured values on the AI differentiale voltage in a file. So the idea is we need at each Ts=1/fs where fs=0.25MHz to take sample so in this case we can buffer the samples at the input buffer of the reading block then we write them in a file? Our aim is to monitor the voltage difference on AI0 mode differentiale during the test of the DUT then it is during the DUT start to reveive the 4096 samples @ 5MHZ.

Many thanks

Yenass

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The main problem I saw in your posted code was that you only read the AI data once *before* the loop.   I made a few mods to simplify the code now that I've come to understand that Finite Sampling can work just fine for you.   There's a few comments to explain certain changes.

 

This should either work for you or at least be really close.

 

 

-Kevin P

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