02-23-2020 07:33 AM
Hi,
I am using python to generate analog signals.
In addition to two analog signals that I am generating I want to generate a digital signal which should start at each cycle of the analog signal. I searched a lot for an answer
seems that the way to go is to specify the same clock for the analog and the digital tasks. however I don't know how to specify the clock for the digital output, while my analog outputs clock are just the internal clock.
Thank you
Solved! Go to Solution.
02-24-2020 02:33 AM
I am trying to set the clock source of the analog task and the digital task to the same clock. the clock that I am trying to use is the counter (Ctr0) but when I am trying to configure the clock source of the tasks to 'Ctr0InternalOutput' I am getting an error that this property is not supported. Am I calling it wrong?
Can somebody advice please
02-25-2020 10:23 AM
Please do the following:
02-25-2020 10:35 AM
Thank you croohcifer for you reply.
I eventually solved this. I will, however, since this is opened already, post a complete specification of hardware and the solution.
I am using a PXIe-1073 chassis with a PXI-6733 which is connected to a BNC-2110.
I wanted to make a digital signal from ao0 to be emitted simultaneously with a digital signal port0/line0; i.e. make them use the same clock.
The solution was simple, but somehow it was difficult to find the naming convention of the clock.
I will post the code that I am using:
#imports
import nidaqmx
from nidaqmx import stream_writers
#channels rates
sampling_rate = 20000
samples_per_chan = 500
#define signals
signal_square = np.append(np.ones(20), np.zeros(480))
T = 10*[True]
F = 490*[False]
digital = T + F
#define tasks
analog_output = nidaqmx.Task()
digital_output = nidaqmx.Task()
analog_output.ao_channels.add_ao_voltage_chan('PXI1Slot4/ao0')
analog_output.timing.cfg_samp_clk_timing(rate=20000, sample_mode=nidaqmx.constants.AcquisitionType.CONTINUOUS, samps_per_chan = 500)
writer = stream_writers.AnalogSingleChannelWriter(analog_output.out_stream, auto_start=False)
digital_output.do_channels.add_do_chan('PXI1Slot4/port0/line0')
digital_output.timing.cfg_samp_clk_timing(rate=20000, source='ao/SampleClock', sample_mode=nidaqmx.constants.AcquisitionType.CONTINUOUS, samps_per_chan=500)
#writing commands
writer.write_many_sample(signals, False)
digital_output.write(digital, False)
#Start
digital_output.start()
analog_output.start()
note that two things are important here: first "auto_start=False", and secondly start the digital_output task before the analog_output task.
what I was missing is the name of the source of the digital clock ('ao/SampleClock')