pxi-5105 clock and trigger

[mhfracis]

I'm using a PXI-5105 to acquire samples with an external clock and trigger.  Since there is only one clock input, i'm using a rtsi line for my trigger. 

1) how do you turn off the pll?  In the following example, I can turn unplug the cable to PFI1 (acquire clock) and the vi still acquires.  Running the same acquire with DAQmx acts the same (Disabled subdiagram).

2)Does the pxi5105 acquire on the rising or falling edge?

3)What are the reasons for not using DAQmx in this situation?  I understand that I loose some functionality if I don't us NI-SCOPE. 

Equipment:

Labview 8.2

PXI-8187 controller

PXI-1006 chassis

PXI-5105

PXI-6115

[David L.]

Hi Matt,

The reason why disconnecting PFI1 does not throw an error is because currently PFI1 is connected to the ‘sync pulse source’ of the ‘niscope configure clock.vi’. The LabVIEW Help describes this as “specifies the line on which the one-time sync pulse is sent or received.” Since the one time pulse has been sent, disconnecting PFI1 later will not be a problem. If you are wanting to use PFI 1 as a sample clock, use a scope property node and inputs for sampleclock timebase devisor, rate, & source. If you want to use PFI1 as a reference clock, than put this as an input to the ‘reference clock source’ node on the configure clock.vi you are currently using.

Question2:

The data is clocked in on the rising edge of the clock

Question3:

NI-SCOPE is the scope drivers, and is built upon NI-DAQmx, which is the reason for partial functionality and why you see your 5105 under NI-DAQmx devices in Measurement and Automation Explorer. NI-SCOPE is the required driver for full functionality on the 5105.

[Douglasg610]

I am using a pair of PXI-5105 boards with the PFI1 connectors attached to a constant fraction dfiscriminator (in a yoke; the same signal is delivered to both).  I am having some hesitation about how to insert the Configure Clock subVI to make this work.  My code, greatly simplified, appears in the attached vi.  I need to know if THIS is the correct placement of the Configure Clock subVI, whether the externally supplied signal is a reference clock source or clock sync pulse
source, and if I must set it for both boards when I am only using one trigger.  The CFD signal will tell the cards exactly when to sample; it is used for no other purpose. 

[Aaron_W.]

Douglas,

That appears correct to me, I could not be completely sure that it would work until you run it. You will only need to send the trigger and clock to one of the devices as since you are using T-CLK that will take care of the rest. I would suggest giving the code a try and then letting us know if something does not work correctly. Our office will be shutdown on Thursday and Friday for the holiday weekend, but we can do troubleshooting the following Monday if necessary. Thanks and have a great 4th of July!

[Douglasg610]

My concern at the moment is the contradiction of Configure Horizontal Timing and Configure Clock.  The "min sample rate" would seem to indicate that, if the external clock is too slow, the sampling rate would happen on its own.  Do these two override one another? 

I am unable to reset the "min sample rate" ahead of time (to be below the clock rate) because of the random nature of the signal for which we are using the Discriminator--I will not know the sampling rate dictated by the discriminator until afterward.

[Aaron_W.]

Douglas,

If I understand correctly you will be varying your sample clock with the device, is this correct? When providing an external sample clock to the scope device, the device needs to know approximately what rate of clock source to expect and that is where the 60 MHz would come into play in this case. Could you give me some more information about your overall application so I understand better exactly what you need the Scope cards to do? Also, could you estimate how much your external clock will vary and at what rate the clock will vary. Thanks!

[Douglasg610]

The application is a radiation detection unit that generates pulses of varying height based on the strength and number of photons that strike the detector, which photons are generated by a scintillation crystal that absorbs beta particles and gamma rays.  The number of pulses per second can be estimated by an external device which counts the pulses received (over a period of time) before the experiment begins.  In other words, the number of pulses of the "clock" or "trigger" circuit can be estimated a few moments before the process begins.

     Assuming a number of pulses per second between 1000 and 10000,  and that we will know approximately how many pulses per second we have before the experiment, what other correction must be made?  We can change the Min Sample Rate during the setup phase for each acquisition, because we use TClk subroutines, which reset the boards, during setup to precisely synchronize things.

[Aaron_W.]

Douglas,

Are you wanting to simply acquire this sample clock that your device will be generating or are you wanting to provide the scope cards this signal as an External Clock to provide a Clock supply for the Scopes? 

If you want to use this signal as an External Clock and you know the rate of the clock a couple of seconds before the start of the scopes then you need to have a way to pass that information along to the Configure Clock VI, so it knows what clock frequency to expect. Is this an option for your system? 

Thanks!

[Douglasg610]

To clarify; the external device that can capture the signal is connected in parallel with the digitizer cards, and its function (in this case) is to count signal pulses.  Then, the user can read this number off the screen and put it into a numeric control on the front panel of the digitizer control VI.  If this is the case, is there a margin of safety for this number?  Can we use this value, the average hits per second (calculated over a period of one-half minutes to one minute), as the min sample rate? 

[Douglasg610]

To clarify, the counting device and the digitizer connect to the RAW signal, which is also connected to a constant fraction discriminator.

The constant fraction discriminator then acts as the PFI1 clock signal, and it has the same pulse rate as the regular signal.