Multisim and Ultiboard

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Multisim netlist checking options?

 

I have a large design.  I need to update the FPGA symbols.  There are 4 FPGA's and the symbols have 22 sections each.  The 4 FPGA's are in duplicated subcircuits.

 

Changing the first on is fairly easy if I turn off re-wiring and delete all the old sections and then place new ones.

 

The problem is the sections placed in the other subcircuit instances all come in with different refdes.  So I have to manually rename 3 x 22 sections.  Each section takes about 5 minutes to rename.

 

Is there any option in MS to turn off whatever is being checked such as there is for UB where checking can be turned off or real tiem or on action end?

 

I've asked about this slow performance of MS here before and assume if there was such a feature I would have been told about it, but for the hours I'll spend doing this it's worth checking again.

 

MS should really have:

  • ability to turn off whatever is taking so long until I change them all and then have it check to do whatever - after I'm done.
  • ability to mass rename subsections by selecting them all in the spreadsheet.  Should allow mass renaming so long as only unique subsections that fit in one part are selected.

Those would be nice features to add.

 

Thanks.

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Hello,

 

I will pass this on to development as feedback for future releases.

 

Thanks,

Miguel V
National Instruments
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