Problem building Master/Salve J-K Flip-Flop out of gates in MS9

[bob111]

Hi all,

Hopefully this is a quick one. 

I need to build a master/slave jk flip-flop out of gates, specifically ANDs and NORs (and inverters). 

I cannot figure out what I am doing incorrectly. 

Here is a picture and my .ms9 file.

Any help would be greatly appreciated.

Thank you!  🙂

-b

 

[lacy]

In ordeer for this circuit to work, one ou[put must come up high while the other is low. This is not happening. My observations show me that both outputs start off low and this disable U4A and U4B right off the bat. There is not way it will work under these conditions. I have not been able to get this working even in Version 10.1. I think it has a lot to do with the cross connected NOR gate creating this problem. I this this is "confusing" the spice engine and it is arbitraily setting them both to zero because it can't make up its mind on a starting state.

This is my theory and I could be wrong. If I am right then this should be considered a software error. The circuit should work as wired with no probelms.

[bob111]

Thank you for the reply.  I noticed it works with other gates.  Strange, but that is okay, I figured it out.  Thanks!